Reputation: 495
I need to force my synthesizer or compiler to use RAM blocks to storage data.
For example, here's code:
type REG_Memory is array (0 to 3) of std_logic_vector(15 downto 0);
signal Memory : REG_Memory :=
(x"0001",
x"0010",
x"0100",
x"1000");
When I compile it and see compiler results it don't use any RAM blocks but logic cells. I need to use RAM blocks as Register storage, how I can do that? Device I'm using is IGLOO, can I do this? or it will loose data on device reboot?, synplify pro is the synthesizer.
Upvotes: 1
Views: 628
Reputation: 3655
Look in the documentation. Synplify has a good FPGA reference manual with code examples and constraints for how to get the behavior you desire. There are multiple ways to achieve what you want (in HDL, in constraint file, etc).
You want to look at the Synopsys FPGA Synthesis Reference Manual. Specifically in the Microsemi section. In the same manual, you can also find sections on RAM and ROM inference.
The manual is located in the "doc" directory of your installation.
Here is a ROM example they provide (there are other examples given):
library ieee;
use ieee.std_logic_1164.all;
entity rom4 is
port (a : in std_logic_vector(4 downto 0);
z : out std_logic_vector(3 downto 0));
end rom4;
architecture behave of rom4 is
begin
process(a)
begin
if a = "00000" then
z <= "0001";
elsif a = "00001" then
z <= "0010";
elsif a = "00010" then
z <= "0110";
elsif a = "00011" then
z <= "1010";
elsif a = "00100" then
z <= "1000";
elsif a = "00101" then
z <= "1001";
elsif a = "00110" then
z <= "0000";
elsif a = "00111" then
z <= "1110";
elsif a = "01000" then
z <= "1111";
elsif a = "01001" then
z <= "1110";
elsif a = "01010" then
z <= "0001";
elsif a = "01011" then
z <= "1000";
elsif a = "01100" then
z <= "1110";
elsif a = "01101" then
z <= "0011";
elsif a = "01110" then
z <= "1111";
elsif a = "01111" then
z <= "1100";
elsif a = "10000" then
z <= "1000";
elsif a = "10001" then
z <= "0000";
elsif a = "10010" then
z <= "0011";
else
z <= "0111";
end if;
end process;
end behave;
Upvotes: 2