CODEWITHSUNDEEP
verilogsystem-verilogquartus
Big_t boy
Big_t boy

Reputation: 329

System Verilog Error , GPIO_0 is not a function

I have a module like this 

module DE1_SoC (CLOCK_50, HEX0, HEX1, HEX2, HEX3, SW, GPIO, KEY);
    input CLOCK_50; // 50MHz clock.
    output reg [6:0] HEX0;
    output reg [6:0] HEX1;
    output reg [6:0] HEX2;
    output reg [6:0] HEX3;
    inout [35:0] GPIO;
    input [9:0] SW;
    input [4:0] KEY;


control_top U_control_top(
    start(SW[0]),
    reset(SW[1]),
    clock(CLOCK_50),
    controller(~KEY[0]),
    GPIO(GPIO_0[35:0]),
    out_1(HEX0),
    out_2(HEX1),
    out_3(HEX2),
    out_4(HEX3)
);

And I kept getting an error called:

Error (10153): Verilog HDL Function Call or Function Declaration error at DE1_SoC.sv(17): identifier "GPIO" is not a function

And my control_top module is like this

module control_top(
    input  start,
    input  reset,
    input  clock,
    //=========connect to bird_controller=====
    input controller,
    //========connect to led_matrix=====
    inout [35:0] GPIO_0,
    //====connect to HEX================
    output [6:0] out_1,
    output [6:0] out_2,
    output [6:0] out_3,
    output [6:0] out_4 
    );

Upvotes: 2

Views: 2046

Answers (1)

toolic
toolic

Reputation: 62083

You need to add a dot (.) before each signal name when you instantiate module ports by name:

control_top U_control_top(
    .start(SW[0]),
    .reset(SW[1]),
    .clock(CLOCK_50),
    .controller(~KEY[0]),
    .GPIO_0(GPIO_0[35:0]),
    .out_1(HEX0),
    .out_2(HEX1),
    .out_3(HEX2),
    .out_4(HEX3)
);

Upvotes: 2

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