CODEWITHSUNDEEP
vhdl
remivass
remivass

Reputation: 41

VHDL if statement - Syntax error near text

Can anyone see what is wrong with my code?

I get a error on the comment line. Saying syntax error near text. I tried to change from both binary to hex numbers, but keep getting the same error. Were the errors are is comment selected.

This are the errors:

Error (10500): VHDL syntax error at MAL.vhd(26) near text
Error (10500): VHDL syntax error at MAL.vhd(26) near text ""; expecting "then"
Error (10500): VHDL syntax error at MAL.vhd(26) near text ­ Error (10500): VHDL syntax error at MAL.vhd(26) near text ¬
Error (10500): VHDL syntax error at MAL.vhd(29) near text "else"; expecting "end", or "(", or an identifier ("else" is a reserved keyword), or a sequential statement
Error (10500): VHDL syntax error at MAL.vhd(31) near text "if"; expecting "process"

LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
USE ieee.numeric_std.ALL;
USE ieee.std_logic_unsigned.ALL;

ENTITY MAL IS
    PORT (
        clk_50 : IN std_logic;
        pulse_out : OUT std_logic
    );
END MAL;

ARCHITECTURE behave OF MAL IS
    SIGNAL pulse : std_logic;
    SIGNAL counter : std_logic_vector(15 DOWNTO 0);
BEGIN
    PROCESS (clk_50) IS
    BEGIN
        pulse <= '0';
        -- if counter = ‭x"‭C34F‬"‬ then
        -- counter <= (others => '0');
        pulse <= '1';
        -- else
        counter <= counter + 1;
        END IF;
    END PROCESS;

    --output
    pulse_out <= pulse;

END ARCHITECTURE behave;

Upvotes: 2

Views: 4599

Answers (1)

lasplund
lasplund

Reputation: 1440

You have some illegal character in there. Remove line 27 and re-write it and you should be ok.

Upvotes: 3

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