Reputation: 1
Is there a way to set a number of ports from generic in VHDL?
I'm facing a "problem", in the sense that I'm building a VHDL module that should give the possibility to take at out a port from N at input, so a MUX, but my concern is about the input ports, as they come from other modules instanciated in the design, and they could be from 1 up to N (I can have the generic N). My question is: is there a way to implement N input ports of my mux, if N is a generic? I wouldn't want to have too many of them and go for the worst case of the maximum allowed N and instanciate them one by one. I had already thought about using only one input port of width N*datawidth and then multiplexing by selecting the correct range of that larger port, but my tutors didn't like the solution, because from block design (the module is part of an IP Core) it would be messy to connect the ports from the other modules to my mux correctly. Thanks in advance
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