Reputation: 450
I have some doubts on Instruction pipelining.
I have an assembly
0x111: div %ecx
0x112: add $0x13,%ecx #The address 112 is not real, I just kept to show that there is no instructions between div and add
The program counter,RIP points to 0x111
. My doubt is that will the processor execute(instruction pipelining or order change / Any reason) 0x112's
instruction while RIP
is at 0x111
. If I stop the execution at RIP 0x111
, is there any chance that 0x112
is executed and %ecx
value is 0X13
?
Upvotes: 2
Views: 432
Reputation: 58805
No. The general rule is that features like pipelining are completely transparent to any single thread of execution (i.e. a single core), and that the CPU ensures that everything appears exactly as if the instructions had been executed sequentially in program order, except maybe faster. If execution stops at address 0x112
, whether due to an interrupt or breakpoint or any other reason, you will see %ecx
containing the result of the div
but without the added 0x13
.
It's possible that internally, the machine had gone ahead and executed the add
already, perhaps using some unnamed internal registers, but if so then the machine is responsible for "rolling back" this execution, so that the architectural register %ecx
contains what it is supposed to by the time you are able to inspect it.
Pipelining and other sorts of execution/memory reordering are relevant when thinking about performance, but not when thinking about what the program actually does. The exception is in multi-threaded programs, since due to such features, memory accesses performed by one thread may not be seen in the same order by other threads, and one may need barriers in certain cases where this ordering is important. But to be clear, this does not apply to single-threaded programs.
Upvotes: 7