Reputation: 31
Say I want to use the following Makefile:
config:
echo "STR = YAY" > params
-include params
do_print: config
echo $(STR)
For this to work I need to run make in two steps, first make config
to generate the params
file and only then I can run make do_print
and it would print the YAY
.
I am looking for a way that running make do_print
will be able to generate the params
file , include it and execute the print in "one pass".
Thanks
Upvotes: 0
Views: 274
Reputation: 12909
The main issue with your makefile
as shown is that you don't provide make
with the correct information re. dependencies. The following...
config:
echo "STR = YAY" > params
tells make
that running the commands will create/update the non-phony target named config
. But it doesn't. It actually creates/updates a file named params
. Since params
is a real file and also the one you want to include just rename the target and adjust the rest of the makefile
accordingly. In addition you need (I think?) to use a phony dependency to force the params
rule to be executed every time make
is invoked and to ensure params
is only updated if necessary (to prevent an infinite loop). Try something like...
.PHONY: FORCE
params: FORCE
echo "STR = YAY" > [email protected]
diff -q $@ [email protected] || cp [email protected] $@
-include params
do_print: params
echo $(STR)
Upvotes: 2
Reputation: 3086
If you dont't want to use another target , then you could use below, but am not sure about your usecase:
$(shell echo "STR = YAY" > params)
-include params
do_print:
echo $(STR)
OR
As suggested by @Renaud Pacalet, you could change the name of your target
Upvotes: 0