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system-verilog
rishav paul
rishav paul

Reputation: 1

SystemVerilog: Data types and display of default size of data type

How can I display the size of a 'real' (or 'float') in system verilog?

$bits can display size of int, shortint, longint, time, integer, etc. but cannot do the same for a real.

Upvotes: 0

Views: 1584

Answers (2)

Serge
Serge

Reputation: 12344

real is not a real verilog type. It is intended for testbench or for analog calculations, not for design. Therefore it has no bit size associated with it.

However from lrm:

The real data type is the same as a C double. The shortreal data type is the same as a C float. The realtime declarations shall be treated synonymously with real declarations and can be used interchangeably. Variables of these three types are collectively referred to as real variables.

And there is a function which converts real to bits:

$realtobits converts values from a real type to a 64-bit vector representation of the real number.

and corresponding

$bitstoreal converts a bit pattern created by $realtobits to a value of the real type

So, you can assume that the size of real is 64 bits after conversion to bits.

Upvotes: 0

dave_59
dave_59

Reputation: 42623

You cannot select individual bits of a real number, nor is there any other construct that requires to know the number of bits in a real number. So SystemVerilog does not need to provide a way to tell you.

Upvotes: 0

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