StackOverflow Questions for Tag: memory-bandwidth

smz
smz

Reputation: 505

Tracking DRAM traffic in AMD Zen 2 (Rome)

Score: 2

Views: 85

Answers: 1

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aggieNick02
aggieNick02

Reputation: 2787

Why is Skylake so much better than Broadwell-E for single-threaded memory throughput?

Score: 19

Views: 5807

Answers: 2

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TinyOlap
TinyOlap

Reputation: 47

What memory bandwidth utilisation to expect? And why does multi-threading/multi-processing make it worse?

Score: 2

Views: 128

Answers: 2

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user27594645
user27594645

Reputation: 17

Does enabling compression in thrift helps memory bandwidth bottleneck if you have low cpu util and network util?

Score: 0

Views: 40

Answers: 0

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xealits
xealits

Reputation: 4566

Why sysbench memory read benchmark shows higher bandwidth than the theoretical limit?

Score: 2

Views: 510

Answers: 1

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Hari Krishna
Hari Krishna

Reputation: 109

What is difference between mem copy and full copy in lmbench3?

Score: 0

Views: 61

Answers: 0

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Kensmosis
Kensmosis

Reputation: 115

Can't seem to achieve anywhere near my GPU global memory bandwidth in OpenCL

Score: 0

Views: 63

Answers: 1

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user25664889
user25664889

Reputation: 53

Why does a for-loop copy not achieve peak CPU-RAM bandwidth on one core?

Score: 0

Views: 104

Answers: 1

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Bruce Merry
Bruce Merry

Reputation: 790

Not getting any cache-pollution benefit from PREFETCHNTA on Zen 3

Score: 1

Views: 160

Answers: 1

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Nitin Malapally
Nitin Malapally

Reputation: 648

Simple streaming loop shows higher effective B/W than DRAM B/W for small enough problems

Score: 0

Views: 150

Answers: 1

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Kailash gogineni
Kailash gogineni

Reputation: 13

How to calculate the L3 cache bandwidth by using the performance counters linux?

Score: 1

Views: 1873

Answers: 1

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platelet
platelet

Reputation: 185

There is a huge speed difference between reading and writing in DRAM, is this normal?

Score: 2

Views: 149

Answers: 0

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Albert Caldas
Albert Caldas

Reputation: 135

Why accessing an array of int8_t is not faster than int32_t, due to cache?

Score: 1

Views: 268

Answers: 1

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einpoklum
einpoklum

Reputation: 132128

Load/stores per cycle for recent CPU architecture generations

Score: 3

Views: 1421

Answers: 1

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Frontier_Setter
Frontier_Setter

Reputation: 649

Why using non-temporal store instructions cannot reduce memory bandwidth usage? (Writes seem to be generating extra reads)

Score: 4

Views: 186

Answers: 0

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Frontier_Setter
Frontier_Setter

Reputation: 649

How do different monitoring tools calculate memory bandwidth?

Score: 1

Views: 106

Answers: 0

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TheAhmad
TheAhmad

Reputation: 940

Workload Memory Bandwidth Comparison Inconsistency

Score: 0

Views: 111

Answers: 0

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Frontier_Setter
Frontier_Setter

Reputation: 649

How to test the “random access bandwidth" of memory?

Score: 0

Views: 481

Answers: 1

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veda
veda

Reputation: 6614

CUDA: Memory performance, What is Global memory bandwidth

Score: 2

Views: 5261

Answers: 1

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Pouya
Pouya

Reputation: 1959

Why vectorizing the loop over 64-bit elements does not have performance improvement over large buffers?

Score: 41

Views: 7635

Answers: 4

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