StackOverflow Questions for Tag: opcode

phuclv

Reputation: 41952

How does the instruction decoder differentiate between EVEX prefix and BOUND opcode in 32-bit mode?

assemblyx86instructionsopcode

Score: 13

Answers: 2

c00000fd

Reputation: 22307

What is the purpose of the 40h REX opcode in ASM x64?

windowsassemblyx86-64machine-codeopcode

Score: 7

Answers: 4

user1927468

Reputation: 1133

Display PHP Opcode without execution

phpopcode

Score: 0

Answers: 2

daveW

Reputation: 601

RiscV spec v2.1 Vol 1 User Level ISA duplicate opcodes listing?

assemblyspecificationsriscvopcodeinstruction-encoding

Score: 0

Answers: 1

user277465

Reputation:

easy way to get opcodes

assemblyx86machine-codeopcode

Score: 6

Answers: 5

Ron

Reputation: 113

Database for assembly instructions?

assemblyx86opcodemnemonics

Score: 3

Answers: 4

rdre8

Reputation: 49

x86 instructions, interpretation by stack pointer

x86stackopcode

Score: -1

Answers: 1

rdre8

Reputation: 49

x86 opcodes for the xor instruction, cannot find detail required in manuals

x86xoropcode

Score: 0

Answers: 1

CuriousMind

Reputation: 8943

How OS code gets executed by microprocessor when microprocessor have limited set if instructions / opcodes

operating-systemx86-16microprocessorsopcode

Score: 0

Answers: 1

Virtual Wizard

Reputation: 21

what bits in an arm64 instruction is the operation code?

assemblyarm64opcodeinstruction-encoding

Score: 1

Answers: 0

jatin kumar

Reputation: 21

Migrations hit an invalid opcode while deploying

javascriptsolidityweb3jstruffleopcode

Score: 1

Answers: 2

Arya

Reputation: 66

Opcode for label in assembly language

assemblylabelopcode8085

Score: 1

Answers: 1

ummmsso

Reputation: 13

LLVM invalid cast opcode for cast from 'i64' to 'i64'

c++compiler-constructionllvmopcode

Score: 0

Answers: 0

George Penn.

Reputation: 413

Why are JSR/RET deprecated Java bytecode?

javajvmbytecodedeprecatedopcode

Score: 18

Answers: 2

dex

Reputation: 11

Can't supply assets via call Solidity

ethereumsoliditycallopcode

Score: 0

Answers: 1

Fox1942

Reputation: 366

How to print out the literal value of a Spir-V OpConstant?

parsingbytecodeopcodespir-v

Score: -1

Answers: 1

Knifick

Reputation: 5

How can an address that receives bytes through movs transfer bytes to another address that receives bytes through movups

assemblydisassemblyopcodecheat-engine

Score: 0

Answers: 0

IRP_HANDLER

Reputation: 308

Extracting opcodes from arm64 (ARMv8.5-A) instructions

x86arm64disassemblymachine-codeopcode

Score: 0

Answers: 1

110100100

Reputation: 33

NASM says "Invalid combination of opcode and operands" for MUL with two operands

assemblyx86nasmopcodeoperands

Score: 1

Answers: 1

Raed Diab

Reputation: 1

Invalid opcode in Metamask and Ganache

metamaskopcodeganacheremix-ide

Score: 0

Answers: 1

PreviousPage 1Next

StackOverflow Questions for Tag: opcode

How does the instruction decoder differentiate between EVEX prefix and BOUND opcode in 32-bit mode?

What is the purpose of the 40h REX opcode in ASM x64?

Display PHP Opcode without execution

RiscV spec v2.1 Vol 1 User Level ISA duplicate opcodes listing?

easy way to get opcodes

Database for assembly instructions?

x86 instructions, interpretation by stack pointer

x86 opcodes for the xor instruction, cannot find detail required in manuals

How OS code gets executed by microprocessor when microprocessor have limited set if instructions / opcodes

what bits in an arm64 instruction is the operation code?

Migrations hit an invalid opcode while deploying

Opcode for label in assembly language

LLVM invalid cast opcode for cast from &#39;i64&#39; to &#39;i64&#39;

Why are JSR/RET deprecated Java bytecode?

Can&#39;t supply assets via call Solidity

How to print out the literal value of a Spir-V OpConstant?

How can an address that receives bytes through movs transfer bytes to another address that receives bytes through movups

Extracting opcodes from arm64 (ARMv8.5-A) instructions

NASM says &quot;Invalid combination of opcode and operands&quot; for MUL with two operands

Invalid opcode in Metamask and Ganache

LLVM invalid cast opcode for cast from 'i64' to 'i64'

Can't supply assets via call Solidity

NASM says "Invalid combination of opcode and operands" for MUL with two operands