Reputation: 2802
How do I know where the port/signal/value should be placed on which side of the arrows?
I noticed that by switching
port_a => x
to x <= port_a
which seems very equal, I got an error.
Also, x => port_a
doesn't work.
I even do not know which way the arrows should point.
Upvotes: 3
Views: 10364
Reputation: 563
If =>
is for a ports list then how is this possible? Please note that clk_40Mhz_i
is a pin.
COMPONENT clk_wiz_v3_5 is
PORT
(-- Clock in ports
CLK_IN1 : in std_logic;
-- Clock out ports
CLK_OUT1 : out std_logic;
-- Status and control signals
RESET : in std_logic;
LOCKED : out std_logic
);
END COMPONENT;
xclk_wiz_v3_5: clk_wiz_v3_5
PORT MAP (
CLK_IN1 => clk_40Mhz_i,
-- Clock out ports
CLK_OUT1 => clk_40Mhz,
-- Status and control signals
RESET => pic_fpga_reset,
LOCKED => clk_locked
);
pic_fpga_reset <= not(processor_fpga_resetn_i);
reset <= not(clk_locked);
Upvotes: 0
Reputation: 13510
Signal assignments go from right to left using <=
.
The right side must be an input signal from the entity or a signal declared in a process.
The left side can be an output signal (or input/buffer) from the entity, a signal declared in the process or a variable declared in the process.
Beside port mapping mentioned in other answers, the =>
arrow is also used for a totally different thing - to construct vectors.
For example, if v is a 4 bit vector, then v <= (others => '0')
will assign "0000"
to v
. The =>
within the parentheses is a shortcut for assigning different values in different places inside the vector.
Upvotes: 2
Reputation: 16792
<=
is an assignment - specifically a signal assignment, driving a signal with a value from somewhere else. For a physical analogy, the thing on the right hand side drives a value onto the left hand side.
=>
is a port mapping from a pin to a signal. This is not an assignment - the physical analogy might be soldering a pin to a wire.
You can only do "soldering" to instantiations, so =>
mapping only happens inside a port map
. And there, "pins" always go on the left (because that's what the language rules say), which is why you can't do x <= port_a
in a port map
.
Upvotes: 6