CODEWITHSUNDEEP
vhdlfpgaxilinxhdlintel-fpga
ScienceSamovar
ScienceSamovar

Reputation: 432

How to make startup process in VHDL

How to make a process that executes only once on powering up?
It is easy to make a process that executes when reset button is pressed, but how to make it run when you plug in the power supply without touching the reset button?
In my example I want to initialize the LCD on startup and I need to send some commands to it in the beginning, but I don't need it in the process that is dependent on some signal like reset(just let's suppose there is no reset button at all).

Upvotes: 1

Views: 3336

Answers (2)

Paebbels
Paebbels

Reputation: 16211

The state (first run) is stored in a single FF, which is initialized with '1':

signal IsStartup : STD_LOGIC := '1';

FF process without reset:

process(clk)
begin
  if rising_edge(clk) then
    IsStartup <= '0';
  end if;
end process;

Usage example (FSM):

process(clk)
begin
  if rising_edge(clk) then
    if (Reset = '1') then
      State <= ST_RESET;
    else
      State <= NextState;
    end if;
  end if;
end process;

process(State, IsStartup)
begin
  NextState <= State;

  case State is
    when ST_RESET =>
      if (IsStartup = '1') then
        NextState <= ST_STARTUP;
      else
        NextState <= ST_IDLE;
      end if;
  -- ...
  end case;
end process;

Upvotes: 2

Bill Lynch
Bill Lynch

Reputation: 81916

Just use a wait statement with no sensativity list.

process
begin
   assignment <= "101";
   wait;
end process;

That being said, I'd recommend that you instead build this as a state machine.

Upvotes: 2

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