CODEWITHSUNDEEP
vhdl
ndc5057
ndc5057

Reputation: 890

How to use 3-input logic gates in vhdl?

I am just learning vhdl, and am trying to use a 3-input nand gate. The code I have is:

G => (A nand B nand C) after 3 ns;

but this does not compile.

Upvotes: 6

Views: 23020

Answers (3)

William Beach
William Beach

Reputation: 1

You would have to make your three input NAND gate into a two input NAND gate by doing the following:

Convert three input to two input NAND gate

Then you can write the VHDL using only two inputs and it won't be illegal. If you want to write complex NAND logic, you can add a process to your architecture and then use variables to capture sub parts of your logic and then apply NAND to those subparts. Makes it easier to understand where you're at in your function.

Upvotes: 0

Akron
Akron

Reputation: 1534

Oh I think I may know.

G <= (A nand B nand C);

You have the assignment operator sign reversed, yes?

Really delayed edit:

VHDL will not compile with the A nand B nand C syntax presented above, this gives a syntax error. Best to do what Paul suggests and pull the not out in front of the logic.

Upvotes: 2

Paul R
Paul R

Reputation: 213200

I'm not an expert on VHDL but I think you have a couple of mistakes there - it should probably be:

G <= not (A and B and C) after 3 ns;

i.e. the assignment is in the wrong direction and I'm not sure that nand commutes in the way that you need it to for 3 inputs, hence the use of and for the inputs and then not to invert the output.

Upvotes: 14

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