CODEWITHSUNDEEP
verilogfpga
Arash Fotouhi
Arash Fotouhi

Reputation: 2113

How to connect two nets in verilog (how to connect two physical pins in an FPGA)?

I'm new to Verilog and I'm trying to connect two physical pins within the FPGA. I have:

module top
(
   pin1,
   pin2
);

input pin1;
output pin2;

assign pin2 = pin1;

pin1 and pin2 are assigned to physical pins in the constraint file (ucf or xdc).

Is this the right thing to do? Essentially, in my hardware I have pin1 going to the FPGA and pin2 coming out of the FPGA. I want to drive pin2 by pin1.

Thanks,

Upvotes: 0

Views: 2255

Answers (1)

Doov
Doov

Reputation: 863

That'll work, but it depends on what you ultimately want to do/what kind of signals they are/what matters to you. For example if these are clock signals that's probably not the right way to do it (you should use and ODDR2 flipflop assuming you're in xilinx land or the equivalent in altera). You should also realize that you're not making an electrical switch per se -- it's a logical switch.

Upvotes: 2

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