CODEWITHSUNDEEP
veriloghdlactive-hdl
M.X
M.X

Reputation: 195

viewing waveform- Active hdl

I am quite new to verilog and active-hdl. I have got a problem and I would appreciate it if someone could advise me on this.

I can't see the waveforms of second layer modules on waveform viewer. More precisely, the signals in submodules show either Z or X.

Please note that I have enabled read/write access through tools/preferences/simulation/ access design object.

For example I am generating a clk in tb module and connect it to clk_mod, trying to see the clk in clk_mod, however for clk it shows only "Z" and for "i" only "X". 

`timescale 1ns/100ps

module tb;
reg clk;
clk_mod dut(.clk(clk));    

initial
    begin
        clk = 0;
        forever
            #5 clk = ~clk;
    end
endmodule


module clk_mod (input clk);

reg i;
always @(posedge clk) 
    begin
        i=10;   
    end 

endmodule

Upvotes: 1

Views: 283

Answers (1)

Serge
Serge

Reputation: 12354

I think that your tb is lacking exit from simulation. you should add the following statement to the tb module (as a separate statement):

 initial #20 $finish;

This would finish simulation at step 20 and should create waveforms for you, if you use right tools.

Also, you declared i as a single-bit reg, so, you cannot fit '10' in to it. So, your waveform should show toggling clock and a single transaction of 'i' from 'x' to '0'.

I guess you should have declared 'i' as this:

reg [3:0] i;

Upvotes: 0

Related Questions