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StackOverflow Questions for Tag: spinalhdl

Reputation: 425

Vexriscv - implement ram as block ram

blockfpgaramriscvspinalhdl

Score: 1

Views: 197

Answers: 1

Reputation: 11

scala process never finishes in IDEA

javascalaintellij-ideajvmspinalhdl

Score: 1

Views: 49

Answers: 0

Reputation: 1

What is the meaning of Masked() in Scala's library SpinalHDL

Score: 0

Views: 57

Answers: 1

BossWangST

Reputation: 31

SpinalHDL ConfigClockDomain not work, how to drive configured clock domain when simulating?

javascalaspinalhdl

Score: 0

Views: 252

Answers: 1

Reputation: 95

Can I use SpinalEnum as field in RegIf?

Score: 0

Views: 67

Answers: 1

s vhb

Reputation: 21

combine logical expression for StaticMemeoryTranslatorPlugin used in VexRiscv

Score: 1

Views: 71

Answers: 1

ato1337

Reputation: 1

Connecting AXI Stream to StreamFifo

Score: 0

Views: 357

Answers: 1

Reputation: 1

How to write nested fsm in Chisel like SpinalHDL does?

chiselspinalhdl

Score: 0

Views: 368

Answers: 1

Reputation: 95

Is it possible to convert from Bits to SpinalEnum?

Score: 1

Views: 96

Answers: 1

Reputation: 31

Strange behaviour of yosys on FSM while building for iCE40

verilogyosysspinalhdl

Score: 1

Views: 450

Answers: 1

natanvotre

Reputation: 111

How can I make a ternary condition in SpinalHDL?

Score: 2

Views: 142

Answers: 1

Reputation: 558

Giving User-Defined properties for a signal

Score: 1

Views: 103

Answers: 1

acapola

Reputation: 1243

How to connect a Flow to a Stream in SpinalHDL

Score: 0

Views: 252

Answers: 1

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